Cypress Semiconductor CY8C24223A Bedienungsanleitung

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CY8C24123A
CY8C24223A, CY8C24423A
PSoC
®
Programmable System-on-Chip™
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 38-12028 Rev. *J Revised April 14, 2009
Features
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
2.4 to 5.25V Operating Voltage
Operating Voltages Down to 1.0V Using On-Chip Switch
Mode Pump (SMP)
Industrial Temperature Range: -40°C to +85°C
Advanced Peripherals (PSoC
®
Blocks)
Six Rail-to-Rail Analog PSoC Blocks Provide:
Up to 14-Bit ADCs
Up to 9-Bit DACs
Programmable Gain Amplifiers
Programmable Filters and Comparators
Four Digital PSoC Blocks Provide:
8 to 32-Bit Timers, Counters, and PWMs
CRC and PRS Modules
Full-Duplex UART
Multiple SPI Masters or Slaves
Connectable to All GPIO Pins
Complex Peripherals by Combining Blocks
Precision, Programmable Clocking
Internal ±2.5% 24/48 MHz Oscillator
High accuracy 24 MHz with optional 32 kHz Crystal and PLL
Optional External Oscillator, up to 24 MHz
Internal Oscillator for Watchdog and Sleep
Flexible On-Chip Memory
4K Flash Program Storage 50,000 Erase/Write Cycles
256 Bytes SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Programmable Pin Configurations
25 mA Sink on all GPIO
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO
Up to Ten Analog Inputs on GPIO
Two 30 mA Analog Outputs on GPIO
Configurable Interrupt on All GPIO
New CY8C24x23A PSoC Device
Derived From the CY8C24x23 Device
Low Power and Low Voltage (2.4V)
Additional System Resources
I
2
C Slave, Master, and MultiMaster to 400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference
Complete Development Tools
Free Development Software (PSoC Designer™)
Full-Featured, In-Circuit Emulator, and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Trace Memory
DIGITAL SYSTEM
SRAM
256 Bytes
Interrupt
Controller
Sleep and
Watchdog
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
Global Digital Interconnect
Global Analog Interconnect
PSoC CORE
CPU Core (M8C)
SROM Flash 4K
Digital
Block
Array
Multiply
Accum.
Switch
Mode
Pump
Internal
Voltage
Ref.
Digital
Clocks
POR and LVD
System Resets
Decimator
SYSTEM RESOURCES
ANALOG SYSTEM
Analog
Ref
Analog
Input
Muxing
I
2
C
Port 2 Port 1 Port 0
Analog
Drivers
System Bus
Analog
Block
Array
Logic Block Diagram
[+] Feedback
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Inhaltsverzeichnis

Seite 1 - Programmable System-on-Chip™

CY8C24123ACY8C24223A, CY8C24423APSoC® Programmable System-on-Chip™Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 4

Seite 2

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 10 of 5528-Pin Part PinoutTable 5. Pin Definitions - 28-Pin PDIP, SSOP, and S

Seite 3

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 11 of 5532-Pin Part PinoutTable 6. Pin Definitions - 32-Pin QFN**Pin No.TypeP

Seite 4

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 12 of 5556-Pin Part PinoutThe 56-pin SSOP part is for the CY8C24000A On-Chip D

Seite 5

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 13 of 5534 I/O P1[6]35 I/O P5[0]36 I/O P5[2]37 I/O P3[0]38 I/O P3[2]39 I/O P3[

Seite 6

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 14 of 55Register ReferenceThis section lists the registers of the CY8C24x23A P

Seite 7

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 15 of 55Table 9. Register Map Bank 0 Table: User Space Name Addr (0,Hex) Acce

Seite 8

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 16 of 55 Table 10. Register Map Bank 1 Table: Configuration Space Name Addr (

Seite 9

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 17 of 55Electrical SpecificationsThis section presents the DC and AC electrica

Seite 10 - CY8C24223A, CY8C24423A

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 18 of 55Absolute Maximum RatingsExceeding maximum ratings may shorten the usef

Seite 11

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 19 of 55DC Electrical Characteristics DC Chip-Level SpecificationsTable 14 lis

Seite 12

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 2 of 55PSoC Functional OverviewThe PSoC family consists of many Mixed-Signal A

Seite 13

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 20 of 55DC General Purpose IO SpecificationsThe following tables list the guar

Seite 14

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 21 of 55DC Operational Amplifier SpecificationsThe following tables list the g

Seite 15

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 22 of 55Table 18. 3.3V DC Operational Amplifier SpecificationsSymbol Descript

Seite 16

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 23 of 55DC Low Power Comparator SpecificationsTable 20 lists the guaranteed ma

Seite 17

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 24 of 55DC Analog Output Buffer SpecificationsThe following tables list the gu

Seite 18

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 25 of 55DC Switch Mode Pump SpecificationsTable 24 lists the guaranteed maximu

Seite 19

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 26 of 55Figure 13. Basic Switch Mode Pump CircuitΔVPUMP_LineLine Regulation (

Seite 20

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 27 of 55DC Analog Reference SpecificationsThe following tables list the guaran

Seite 21

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 28 of 55– RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6] = 0.5V)P2[4] + P2[6] - 0

Seite 22

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 29 of 55DC Analog PSoC Block SpecificationsTable 29 lists the guaranteed maxim

Seite 23

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 3 of 55Analog SystemThe Analog System consists of six configurable blocks, eac

Seite 24

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 30 of 55DC Programming SpecificationsTable 31 lists the guaranteed maximum and

Seite 25

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 31 of 55AC Electrical CharacteristicsAC Chip-Level SpecificationsThe following

Seite 26

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 32 of 55Table 32. 2.7V AC Chip-Level SpecificationsSymbol Description Min Typ

Seite 27

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 33 of 55Figure 14. PLL Lock Timing DiagramFigure 15. PLL Lock for Low Gain S

Seite 28

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 34 of 55AC General Purpose IO SpecificationsThe following tables list the guar

Seite 29

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 35 of 55AC Operational Amplifier SpecificationsThe following tables list the g

Seite 30

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 36 of 55Table 37. 2.7V AC Operational Amplifier SpecificationsSymbol Descript

Seite 31

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 37 of 55When bypassed by a capacitor on P2[4], the noise of the analog ground

Seite 32

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 38 of 55AC Low Power Comparator SpecificationsTable 38 lists the guaranteed ma

Seite 33

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 39 of 55Note18. 50 ns minimum input pulse width is based on the input synchron

Seite 34

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 4 of 55 Low Voltage Detection (LVD) interrupts can signal the appli-cation of

Seite 35

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 40 of 55AC Analog Output Buffer SpecificationsThe following tables list the gu

Seite 36

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 41 of 55AC External Clock SpecificationsThe following tables list the guarante

Seite 37

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 42 of 55 AC Programming SpecificationsTable 47 lists the guaranteed maximum an

Seite 38

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 43 of 55 Figure 22. Definition for Timing for Fast/Standard Mode on the I2C B

Seite 39

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 44 of 55Packaging InformationThis section illustrates the packaging specificat

Seite 40

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 45 of 55Figure 24. 8-Pin (150-Mil) SOIC Figure 25. 20-Pin (300-Mil) Molded D

Seite 41

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 46 of 55Figure 26. 20-Pin (210-Mil) SSOP Figure 27. 20-Pin (300-Mil) Molded

Seite 42

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 47 of 55Figure 28. 28-Pin (300-Mil) Molded DIP Figure 29. 28-Pin (210-Mil) S

Seite 43

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 48 of 55Figure 30. 28-Pin (300-Mil) Molded SOICFigure 31. 32-Pin (5x5 mm) QF

Seite 44

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 49 of 55Figure 32. 32-Pin Sawn QFN Package Important Note For information on

Seite 45

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 5 of 55Development ToolsPSoC Designer is a Microsoft® Windows-based, integrate

Seite 46

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 50 of 55Thermal Impedances Capacitance on Crystal Pins Solder Reflow Peak Tem

Seite 47

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 51 of 55Development Tool SelectionThis section presents the development tools

Seite 48

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 52 of 55CY3210-PSoCEval1The CY3210-PSoCEval1 kit features an evaluation board

Seite 49

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 53 of 55Ordering InformationThe following table lists the CY8C24x23A PSoC devi

Seite 50

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 54 of 55Document History Page Document Title: CY8C24123A, CY8C24223A, CY8C2442

Seite 51

Document Number: 38-12028 Rev. *J Revised April 14, 2009 Page 55 of 55PSoC Designer™ and Programmable System-on-Chip™ are trademarks and PSoC® is a r

Seite 52

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 6 of 55Designing with PSoC DesignerThe development process for the PSoC device

Seite 53

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 7 of 55Document ConventionsAcronyms UsedThe following table lists the acronyms

Seite 54

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 8 of 55PinoutsThis section describes, lists, and illustrates the CY8C24x23A PS

Seite 55

CY8C24123ACY8C24223A, CY8C24423ADocument Number: 38-12028 Rev. *J Page 9 of 5520-Pin Part PinoutTable 4. Pin Definitions - 20-Pin PDIP, SSOP, and SO

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