Cypress Semiconductor CY7C65113C Betriebsanweisung

CY7C65113CUSB Hub with MicrocontrollerCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document #: 38-0

CY7C65113CDocument #: 38-08002 Rev. *G Page 10 of 488-bit Accumulator (A)The accumulator is the general-purpose register for the micro-controller.8

CY7C65113CDocument #: 38-08002 Rev. *G Page 11 of 488-bit Data Stack Pointer (DSP)The Data Stack Pointer (DSP) supports PUSH and POP instruc-tions

CY7C65113CDocument #: 38-08002 Rev. *G Page 12 of 48The XTALIN and XTALOUT are the clock pins to the microcon-troller. The user can connect an exte

CY7C65113CDocument #: 38-08002 Rev. *G Page 13 of 48Watchdog ResetThe WDR occurs when the internal Watchdog Timer rolls over. Writing any value to

CY7C65113CDocument #: 38-08002 Rev. *G Page 14 of 48General-purpose I/O PortsFigure 5. Block Diagram of a GPIO PinThere are 11 GPIO pins (P0[7:0]

CY7C65113CDocument #: 38-08002 Rev. *G Page 15 of 48A read from a GPIO port always returns the present state of the voltage at the pin, independent

CY7C65113CDocument #: 38-08002 Rev. *G Page 16 of 48 Q1, Q2, and Q3 discussed below are the transistors referenced in Figure . The available GPIO d

CY7C65113CDocument #: 38-08002 Rev. *G Page 17 of 4812-bit Free-Running TimerThe 12-bit timer operates with a 1-μs tick, provides two interrupts (1

CY7C65113CDocument #: 38-08002 Rev. *G Page 18 of 48 I2C Configuration RegisterInternal hardware supports communication with external devices throu

CY7C65113CDocument #: 38-08002 Rev. *G Page 19 of 48Bits [7..0]: I2C DataContains the 8-bit data on the I2C BusFigure 16. I2C Status and Control R

CY7C65113CDocument #: 38-08002 Rev. *G Page 2 of 48Functional OverviewThe CY7C65113C device is a one-time programmable 8-bit microcontroller with a

CY7C65113CDocument #: 38-08002 Rev. *G Page 20 of 48start bits, as these cases always cause transmit mode forthe first byte.Bit 4: ACK This bit is

CY7C65113CDocument #: 38-08002 Rev. *G Page 21 of 48is defined as the condition in which both the D+ line andthe D– line are LOW at the same time.B

CY7C65113CDocument #: 38-08002 Rev. *G Page 22 of 48Bit 0: EPA0 Interrupt Enable 1 = Enable Interrupt on data activity through endpoint A0;0 = Disa

CY7C65113CDocument #: 38-08002 Rev. *G Page 23 of 48Interrupt VectorsThe Interrupt Vectors supported by the USB Controller are listed in Table 7. T

CY7C65113CDocument #: 38-08002 Rev. *G Page 24 of 48Interrupt LatencyInterrupt latency can be calculated from the following equation:For example, i

CY7C65113CDocument #: 38-08002 Rev. *G Page 25 of 48Figure 21. GPIO Interrupt Structure. Refer to Sections and for more information of setting G

CY7C65113CDocument #: 38-08002 Rev. *G Page 26 of 48USB OverviewThe USB hardware includes a USB Hub repeater with one upstream and up to seven down

CY7C65113CDocument #: 38-08002 Rev. *G Page 27 of 48Connects are recorded by the time a non-SE0 state lasts for more than 2.5 μs on a downstream po

CY7C65113CDocument #: 38-08002 Rev. *G Page 28 of 48Bit [0..3]: Port x Enable (where x = 1..4)Set to 1 if Port x is enabled; Set to 0 if Port x is

CY7C65113CDocument #: 38-08002 Rev. *G Page 29 of 48The data state of downstream ports can be read through the HUB Ports SE0 Status Register (Figur

CY7C65113CDocument #: 38-08002 Rev. *G Page 3 of 48Logic Block DiagramInterruptControllerPROM12-bitTimerResetWatchdogTimerRepeaterPower-onSCLKI2C c

CY7C65113CDocument #: 38-08002 Rev. *G Page 30 of 48Figure 29. Hub Ports Suspend RegisterBit [0..3]: Port x Selective Suspend (where x = 1..4).Set

CY7C65113CDocument #: 38-08002 Rev. *G Page 31 of 48Figure 31. USB Status and Control Register. Bits[2..0]: Control ActionSet to control action as

CY7C65113CDocument #: 38-08002 Rev. *G Page 32 of 48Bits[6..0]: Device Address.Firmware writes this bits during the USB enumeration pro-cess to the

CY7C65113CDocument #: 38-08002 Rev. *G Page 33 of 48report the type of token received by the corresponding de-vice address is a SETUP token. Any wr

CY7C65113CDocument #: 38-08002 Rev. *G Page 34 of 48Bits[5..0]: Byte Count.These counter bits indicate the number of data bytes in atransaction. Fo

CY7C65113CDocument #: 38-08002 Rev. *G Page 35 of 48USB Mode TablesModeThis lists the mnemonic given to the different modes that can be set in the

CY7C65113CDocument #: 38-08002 Rev. *G Page 36 of 48endpoints reset to the disabled mode (0000). Firmware normally enables the endpoint mode after

CY7C65113CDocument #: 38-08002 Rev. *G Page 37 of 48. Table 13. Details of Modes for Differing Traffic Conditions (see Table 12 for the decode leg

CY7C65113CDocument #: 38-08002 Rev. *G Page 38 of 480 0 1 0 Out 2 UC valid 1 1 updates UC UC 1 1 NoChange ACK yes0 0 1 0 Out 2 UC valid 0 1 updates

CY7C65113CDocument #: 38-08002 Rev. *G Page 39 of 48 Register Summary Address Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Read/W

CY7C65113CDocument #: 38-08002 Rev. *G Page 4 of 48ContentsPin Configurations ...5Product

CY7C65113CDocument #: 38-08002 Rev. *G Page 40 of 48HUB PORT CONTROL, STATUS, SUSPEND RESUME, SE0, FORCE LOW 0x48 Hub Port Connect Status Reserved

CY7C65113CDocument #: 38-08002 Rev. *G Page 41 of 48Sample SchematicAbsolute Maximum RatingsStorage Temperature ...

CY7C65113CDocument #: 38-08002 Rev. *G Page 42 of 48Electrical CharacteristicsfOSC = 6 MHz; Operating Temperature = 0 to 70°C, VCC = 4.0V to 5.25VP

CY7C65113CDocument #: 38-08002 Rev. *G Page 43 of 48 Switching Characteristics (fOSC = 6.0 MHz) Parameter Description Min. Max. UnitClock SourcefO

CY7C65113CDocument #: 38-08002 Rev. *G Page 44 of 48Ordering InformationOrdering Code PROM Size Package Type Operating RangeCY7C65113C-SXC 8 KB 28-

CY7C65113CDocument #: 38-08002 Rev. *G Page 45 of 48Package DiagramFigure 36. 28-Pin (300-Mil) Molded SOIC51-85026 *H

CY7C65113CDocument #: 38-08002 Rev. *G Page 46 of 48Acronyms Document ConventionsUnits of MeasureAcronym DescriptionCMOS complementary metal oxide

CY7C65113CDocument #: 38-08002 Rev. *G Page 47 of 48Document History PageDocument Title: CY7C65113C USB Hub with MicrocontrollerDocument Number: 38

Document #: 38-08002 Rev. *G Revised March 21, 2014 Page 48 of 48Purchase of I2C components from Cypress, or one of its sublicensed Associated Compa

CY7C65113CDocument #: 38-08002 Rev. *G Page 5 of 48Product Summary TablesPin Assignments Pin ConfigurationsFigure 1. CY7C65113C 28-Pin SOIC1234567

CY7C65113CDocument #: 38-08002 Rev. *G Page 6 of 48I/O Register SummaryI/O registers are accessed via the I/O Read (IORD) and I/O Write (IOWR, IOWX

CY7C65113CDocument #: 38-08002 Rev. *G Page 7 of 48Instruction Set SummaryRefer to the CYASM Assembler User’s Guide for more details. Note that con

CY7C65113CDocument #: 38-08002 Rev. *G Page 8 of 48Programming Model14-bit Program CounterThe 14-bit Program Counter (PC) allows access to up to 8

CY7C65113CDocument #: 38-08002 Rev. *G Page 9 of 48Program Memory OrganizationFigure 2. Program Memory Space with Interrupt Vector Table Note that