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Cypress Semiconductor enCoRe CY7C64215 Bedienungsanleitung Seite 9

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CY7C64215
Document 38-08036 Rev. *D Page 9 of 30
28-Pin Part Pinout
The CY7C64215 enCoRe III device is available in a 28-pin package which is listed and illustrated in the following table. Every port pin
(labeled with a “P”) is capable of Digital I/O. However, Vss and Vdd are not capable of Digital I/O.
Table 3. 28-Pin Part Pinout (SSOP)
Pin
No.
Type
Name Description
Figure 4. CY7C64215 28-Pin enCoRe III Device
Digital Analog
1 Power GND Ground connection
2 I/O I, M P0[7] Analog column mux input.
3 I/O I/O,M P0[5] Analog column mux input and column
output
4 I/O I/O,M P0[3] Analog column mux input and column
output.
5 I/O I,M P0[1] Analog column mux input.
6 I/O M P2[5]
7 I/O M P2[3] Direct switched capacitor block input.
8 I/O M P2[1] Direct switched capacitor block input.
9 I/O M P1[7] I2C Serial Clock (SCL).
10 I/O M P1[5] I2C Serial Data (SDA).
11 I/O M P1[3]
12 I/O M P1[1] I2C Serial Clock (SCL), ISSP-SCLK.
13 Power GND Ground connection
14 USB D+
15 USB D-
16 Power Vdd Supply voltage.
17 I/O M P1[0] I2C Serial Data (SDA), ISSP-SDATA.
18 I/O M P1[2]
19 I/O M P1[4]
20 I/O M P1[6]
21 I/O M P2[0] Direct switched capacitor block input.
22 I/O M P2[2] Direct switched capacitor block input.
23 I/O M P2[4] External Analog Ground (AGND) input.
24 I/O M P0[0] Analog column mux input.
25 I/O M P0[2] Analog column mux input and column
output.
26 I/O M P0[4] Analog column mux input and column
output.
27 I/O M P0[6] Analog column mux input.
28 Power Vdd Supply voltage.
LEGEND A = Analog, I = Input, O = Output, and M = Analog Mux Input.
* The MLF package has a center pad that must be connected to ground (Vss).
[+] Feedback
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