Cypress Semiconductor CY8C21x34 Bedienungsanleitung PDF herunterladen

January 12, 2007 © Cypress Semiconductor Corp. 2004-2007 — Document No. 38-12025 Rev. *K 1

PSoC® Mixed-Signal Array Final Data Sheet

CY8C21234, CY8C21334,

CY8C21434, CY8C21534, and CY8C21634

PSoC® Functional Overview

The PSoC® family consists of many Mixed-Signal Array with

On-Chip Controller devices. These devices are designed to

replace multiple traditional MCU-based system components

with one, low cost single-chip programmable component. A

PSoC device includes configurable blocks of analog and digital

logic, as well as programmable interconnect. This architecture

allows the user to create customized peripheral configurations,

to match the requirements of each individual application. Addi-

tionally, a fast CPU, Flash program memory, SRAM data mem-

ory, and configurable IO are included in a range of convenient

pinouts.

The PSoC architecture, as illustrated on the left, is comprised of

four main areas: the Core, the System Resources, the Digital

System, and the Analog System. Configurable global bus

resources allow all the device resources to be combined into a

complete custom system. Each CY8C21x34 PSoC device

includes four digital blocks and four analog blocks. Depending

on the PSoC package, up to 28 general purpose IO (GPIO) are

also included. The GPIO provide access to the global digital

and analog interconnects.

The PSoC Core

The PSoC Core is a powerful engine that supports a rich

instruction set. It encompasses SRAM for data storage, an

interrupt controller, sleep and watchdog timers, and IMO (inter-

nal main oscillator) and ILO (internal low speed oscillator). The

Features

■ Powerful Harvard Architecture Processor

❐ M8C Processor Speeds to 24 MHz

❐ Low Power at High Speed

❐ 2.4V to 5.25V Operating Voltage

❐ Operating Voltages Down to 1.0V Using

On-Chip Switch Mode Pump (SMP)

❐ Industrial Temperature Range: -40°C to +85°C

■ Advanced Peripherals (PSoC Blocks)

❐ 4 Analog Type “E” PSoC Blocks Provide:

- 2 Comparators with DAC Refs

- Single or Dual 8-Bit 28 Channel ADC

❐ 4 Digital PSoC Blocks Provide:

- 8- to 32-Bit Timers, Counters, and PWMs

- CRC and PRS Modules

- Full-Duplex UART, SPI™ Master or Slave

- Connectable to All GPIO Pins

❐ Complex Peripherals by Combining Blocks

■ Flexible On-Chip Memory

❐ 8K Flash Program Storage 50,000 Erase/Write

Cycles

❐ 512 Bytes SRAM Data Storage

❐ In-System Serial Programming (ISSP™)

❐ Partial Flash Updates

❐ Flexible Protection Modes

❐ EEPROM Emulation in Flash

■ Complete Development Tools

❐ Free Development Software

(PSoC Designer™)

❐ Full-Featured, In-Circuit Emulator and

Programmer

❐ Full Speed Emulation

❐ Complex Breakpoint Structure

❐ 128K Trace Memory

■ Precision, Programmable Clocking

❐ Internal ±2.5% 24/48 MHz Oscillator

❐ Internal Oscillator for Watchdog and Sleep

■ Programmable Pin Configurations

❐ 25 mA Drive on All GPIO

❐ Pull Up, Pull Down, High Z, Strong, or Open

Drain Drive Modes on All GPIO

❐ Up to 8 Analog Inputs on GPIO

❐ Configurable Interrupt on All GPIO

■ Versatile Analog Mux

❐ Common Internal Analog Bus

❐ Simultaneous Connection of IO Combinations

❐ Capacitive Sensing Application Capability

■ Additional System Resources

❐ I

C™ Master, Slave and Multi-Master to

400 kHz

❐ Watchdog and Sleep Timers

❐ User-Configurable Low Voltage Detection

❐ Integrated Supervisory Circuit

❐ On-Chip Precision Voltage Reference

1 2 3 4 5 6 ... 41 42

Inhaltsverzeichnis

Seite 1 - CY8C21234, CY8C21334

January 12, 2007 © Cypress Semiconductor Corp. 2004-2007 — Document No. 38-12025 Rev. *K 1PSoC® Mixed-Signal Array Final Data SheetCY8C21234, CY8C213

Seite 2 - The Digital System

January 12, 2007 Document No. 38-12025 Rev. *K 10CY8C21x34 Final Data Sheet 1. Pin Information1.1.3 28-Pin Part Pinout Table 1-3. 28-Pin Part Pinout

Seite 3 - PSoC Device Characteristics

January 12, 2007 Document No. 38-12025 Rev. *K 11CY8C21x34 Final Data Sheet 1. Pin Information1.1.4 32-Pin Part Pinout Table 1-4. 32-Pin Part Pinout

Seite 4 - Development Tools

January 12, 2007 Document No. 38-12025 Rev. *K 12CY8C21x34 Final Data Sheet 1. Pin Information1.1.5 56-Pin Part PinoutThe 56-pin SSOP part is for the

Seite 5 - Hardware Tools

January 12, 2007 Document No. 38-12025 Rev. *K 13CY8C21x34 Final Data Sheet 1. Pin Information48 IO IP2[0]49 IO IP2[2]50 IO P2[4]51 IO P2[6]52 IO I P

Seite 6 - Designing with User Modules

January 12, 2007 Document No. 38-12025 Rev. *K 142. Register ReferenceThis chapter lists the registers of the CY8C21x34 PSoC device. For detailed regi

Seite 7 - Table of Contents

January 12, 2007 Document No. 38-12025 Rev. *K 15CY8C21x34 Final Data Sheet 2. Register ReferenceRegister Map 0 Table: User Space NameAddr (0,Hex)Acc

Seite 8 - 1. Pin Information

January 12, 2007 Document No. 38-12025 Rev. *K 16CY8C21x34 Final Data Sheet 2. Register ReferenceRegister Map 1 Table: Configuration Space NameAddr(

Seite 9 - 1.1.2 20-Pin Part Pinout

January 12, 2007 Document No. 38-12025 Rev. *K 173. Electrical SpecificationsThis chapter presents the DC and AC electrical specifications of the CY8C

Seite 10 - 1.1.3 28-Pin Part Pinout

January 12, 2007 Document No. 38-12025 Rev. *K 18CY8C21x34 Final Data Sheet 3. Electrical Specifications3.1 Absolute Maximum Ratings3.2 Operating Tem

Seite 11 - 1.1.4 32-Pin Part Pinout

January 12, 2007 Document No. 38-12025 Rev. *K 19CY8C21x34 Final Data Sheet 3. Electrical Specifications3.3.2 DC General Purpose IO SpecificationsThe

Seite 12 - Description

January 12, 2007 Document No. 38-12025 Rev. *K 2CY8C21x34 Final Data Sheet PSoC® OverviewCPU core, called the M8C, is a powerful processor with speeds

Seite 13

January 12, 2007 Document No. 38-12025 Rev. *K 20CY8C21x34 Final Data Sheet 3. Electrical Specifications3.3.3 DC Operational Amplifier Specifications

Seite 14 - 2. Register Reference

January 12, 2007 Document No. 38-12025 Rev. *K 21CY8C21x34 Final Data Sheet 3. Electrical Specifications3.3.5 DC Switch Mode Pump SpecificationsThe f

Seite 15

January 12, 2007 Document No. 38-12025 Rev. *K 22CY8C21x34 Final Data Sheet 3. Electrical Specifications3.3.6 DC Analog Mux Bus Specifications The fo

Seite 16

January 12, 2007 Document No. 38-12025 Rev. *K 23CY8C21x34 Final Data Sheet 3. Electrical Specifications3.3.8 DC Programming SpecificationsThe follow

Seite 17 - 3. Electrical Specifications

January 12, 2007 Document No. 38-12025 Rev. *K 24CY8C21x34 Final Data Sheet 3. Electrical Specifications3.4 AC Electrical Characteristics3.4.1 AC Chi

Seite 18 - 3.2 Operating Temperature

January 12, 2007 Document No. 38-12025 Rev. *K 25CY8C21x34 Final Data Sheet 3. Electrical SpecificationsFigure 3-3. 24 MHz Period Jitter (IMO) Timing

Seite 19

January 12, 2007 Document No. 38-12025 Rev. *K 26CY8C21x34 Final Data Sheet 3. Electrical Specifications3.4.2 AC General Purpose IO SpecificationsThe

Seite 20

January 12, 2007 Document No. 38-12025 Rev. *K 27CY8C21x34 Final Data Sheet 3. Electrical Specifications3.4.3 AC Operational Amplifier Specifications

Seite 21 - = 10 µF capacitor, D

January 12, 2007 Document No. 38-12025 Rev. *K 28CY8C21x34 Final Data Sheet 3. Electrical SpecificationsCRCPRS(CRC Mode)Maximum Input Clock Frequency

Seite 22

January 12, 2007 Document No. 38-12025 Rev. *K 29CY8C21x34 Final Data Sheet 3. Electrical Specifications3.4.7 AC External Clock SpecificationsThe fol

Seite 23 - 50,000 cycles)

January 12, 2007 Document No. 38-12025 Rev. *K 3CY8C21x34 Final Data Sheet PSoC® OverviewAnalog System Block Diagram The Analog Multiplexer SystemThe

Seite 24

January 12, 2007 Document No. 38-12025 Rev. *K 30CY8C21x34 Final Data Sheet 3. Electrical Specifications3.4.8 AC Programming SpecificationsThe follow

Seite 25 - Jitter32k

January 12, 2007 Document No. 38-12025 Rev. *K 31CY8C21x34 Final Data Sheet 3. Electrical Specifications3.4.9 AC I2C SpecificationsThe following tabl

Seite 26

January 12, 2007 Document No. 38-12025 Rev. *K 324. Packaging InformationThis chapter illustrates the packaging specifications for the CY8C21x34 PSoC

Seite 27

January 12, 2007 Document No. 38-12025 Rev. *K 33CY8C21x34 Final Data Sheet 4. Packaging InformationFigure 4-2. 20-Lead (210-MIL) SSOPFigure 4-3. 28-

Seite 28

January 12, 2007 Document No. 38-12025 Rev. *K 34CY8C21x34 Final Data Sheet 4. Packaging InformationFigure 4-4. 32-Lead (5x5 mm 0.93 MAX) QFNFigure 4

Seite 29

January 12, 2007 Document No. 38-12025 Rev. *K 35CY8C21x34 Final Data Sheet 4. Packaging InformationImportant Note For information on the preferred

Seite 30

January 12, 2007 Document No. 38-12025 Rev. *K 36CY8C21x34 Final Data Sheet 4. Packaging Information4.2 Thermal Impedances 4.3 Solder Reflow Peak Tem

Seite 31 - C Specifications

January 12, 2007 Document No. 38-12025 Rev. *K 375. Development Tool SelectionThis chapter presents the development tools available for all current PS

Seite 32 - 4. Packaging Information

January 12, 2007 Document No. 38-12025 Rev. *K 38CY8C21x34 Final Data Sheet 5. Development Tool Selection5.2.2 CY3210-ExpressDK PSoC Express Deve

Seite 33 - 51-85077 *C

January 12, 2007 Document No. 38-12025 Rev. *K 39CY8C21x34 Final Data Sheet 5. Development Tool Selection5.5 Accessories (Emulation and Programmi

Seite 34 - 001-06392 *A

January 12, 2007 Document No. 38-12025 Rev. *K 4CY8C21x34 Final Data Sheet PSoC® OverviewGetting StartedThe quickest path to understanding the PSoC si

Seite 35 - 51-85062 *C

January 12, 2007 Document No. 38-12025 Rev. *K 406. Ordering Information. 6.1 Ordering Code DefinitionsCY8C21x34 PSoC Device Key Features and Ordering

Seite 36 - 4.2 Thermal Impedances

January 12, 2007 © Cypress Semiconductor Corp. 2004-2007 — Document No. 38-12025 Rev. *K 417. Sales and Service InformationCypress Semiconductor 7.1

Seite 37 - 5. Development Tool Selection

January 12, 2007 Document No. 38-12025 Rev. *K 42CY8C21x34 Final Data Sheet 7. Sales and Service Information7.2 Copyrights and Code ProtectionCopyrig

Seite 38 - 5.4 Device Programmers

January 12, 2007 Document No. 38-12025 Rev. *K 5CY8C21x34 Final Data Sheet PSoC® OverviewPSoC Designer Software SubsystemsDevice EditorThe device edit

Seite 39 - Your Board

January 12, 2007 Document No. 38-12025 Rev. *K 6CY8C21x34 Final Data Sheet PSoC® OverviewDesigning with User ModulesThe development process for the PS

Seite 40 - 6. Ordering Information

January 12, 2007 Document No. 38-12025 Rev. *K 7CY8C21x34 Final Data Sheet PSoC® OverviewDocument ConventionsAcronyms UsedThe following table lists th

Seite 41 - 7.1 Revision History

January 12, 2007 Document No. 38-12025 Rev. *K 81. Pin InformationThis chapter describes, lists, and illustrates the CY8C21x34 PSoC device pins and pi

Seite 42

January 12, 2007 Document No. 38-12025 Rev. *K 9CY8C21x34 Final Data Sheet 1. Pin Information1.1.2 20-Pin Part Pinout Table 1-2. 20-Pin Part Pinout (