Cypress Semiconductor enCoRe CY7C64215 Bedienungsanleitung PDF herunterladen (Seite 12)

August 17, 2011 Document No. 001-15340 Rev. *A

AN6073

Appendix

Assembler Instruction Differences between M8B and M8C Processor Cores

There are differences in compatibility and timing between the M8C and M8B. Table 1 summarizes these differences. The cycle

count differences are given in the ‘Δ Cycles’ column. .

Table 1. Instructions Comparison between M8B and M8C

B Opcode B Instruction B Cycles C Equiv Inst C Cycles C Opcode Δ Cycles Notes

0 HAL 7 HALT 9 30 2

1 ADD A, expr 4 ADD A, k 4 1 0

2 ADD A,[expr] 6 ADD A, M[k] 6 2 0

3 ADD A,[X+expr] 7 ADD A, M[X+k] 7 3 0

4 ADC A, expr 4 ADC A, k 4 9 0

5 ADC A,[expr] 6 ADC A, M[k] 6 0A 0

6 ADC A,[X+expr] 7 ADC A, M[X+k] 7 0B 0

7 SUB A, expr 4 SUB A, k 4 11 0

8 SUB A,[expr] 6 SUB A, M[k] 6 12 0

9 SUB A,[X+expr] 7 SUB A, M[X+k] 7 13 0

0A SBB A, expr 4 SBB A, k 4 19 0

0B SBB A,[expr] 6 SBB A, M[k] 6 1A 0

0C SBB A,[X+expr] 7 SBB A, M[X+k] 7 1B 0

0D OR A, expr 4 OR A, k 4 29 0

0E OR A,[expr] 6 OR A, M[k] 6 2A 0

0F OR A,[X+expr] 7 OR A, M[X+k] 7 2B 0

10 AND A, expr 4 AND A, k 4 21 0

11 AND A,[expr] 6 AND A, M[k] 6 22 0

12 AND A,[X+expr] 7 AND A, M[X+k] 7 23 0

13 XOR A, expr 4 XOR A, k 4 31 0

14 XOR A,[expr] 6 XOR A, M[k] 6 32 0

15 XOR A,[X+expr] 7 XOR A, M[X+k] 7 33 0

16 CMP A, expr 5 CMP A, k 5 39 0

17 CMP A,[expr] 7 CMP A, M[k] 7 3A 0

18 CMP A,[X+expr] 8 CMP A, M[X+k] 8 3B 0

19 MOV A,expr 4 MOV A, k 4 50 0

1A MOV A,[expr] 5 MOV A, M[k] 5 51 0

1B MOV A,[X+expr] 6 MOV A, M[X+k] 6 52 0

1C MOV X,expr 4 MOV X, k 4 57 0

1D MOV X,[expr] 5 MOV X, M[k] 6 58 1

1E reserved 4

1F XPAGE 4

20 NOP 4 NOP 4 40 0

21 INC A 4 INC A 4 74 0

22 INC X 4 INC X 4 75 0

23 INC [expr] 7 INC M[k] 7 76 0

24 INC [X+expr] 8 INC M[X+k] 8 77 0

25 DEC A 4 DEC A 4 78 0

26 DEC X 4 DEC X 4 79 0

Notes

2. The M8B Halt instruction operates by clearing the FFh register; M8C’s halt adds one to this register.

3. In M8B, moves (or IORD) to the accumulator do not affect the zero flag; in M8C, they do.

4. XPAGE is replaced by automatic increment of the high program-counter byte during 256 byte page crossings, and this adds a single cycle to the instruction

crossing the page.

1 2 ... 7 8 9 10 11 12 13 14 15 16

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