Cypress Semiconductor CY8C24223 Bedienungsanleitung Seite 1

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CY8C24123
CY8C24223, CY8C24423
PSoC
®
Programmable System-on-Chip™
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 38-12011 Rev. *G Revised December 11, 2008
Features
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
3.0 to 5.25 V Operating Voltage
Operating Voltages Down to 1.0V Using On-Chip Switch
Mode Pump (SMP)
Industrial Temperature Range: -40°C to +85°C
Advanced Peripherals (PSoC Blocks)
Six Rail-to-Rail Analog PSoC Blocks Provide:
Up to 14-Bit ADCs
Up to 8-Bit DACs
Programmable Gain Amplifiers
Programmable Filters and Comparators
Four Digital PSoC Blocks Provide:
8 to 32-Bit Timers, Counters, and PWMs
CRC and PRS Modules
Full-Duplex UART
Multiple SPI Masters or Slaves
Connectable to all GPIO Pins
Complex Peripherals by Combining Blocks
Precision, Programmable Clocking
Internal ± 2.5% 24/48 MHz Oscillator
High-Accuracy 24 MHz with Optional 32 kHz Crystal and PLL
Optional External Oscillator, up to 24 MHz
Internal Oscillator for Watchdog and Sleep
Flexible On-Chip Memory
4K Bytes Flash Program Storage 50,000 Erase/Write Cycles
256 Bytes SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Programmable Pin Configurations
25 mA Sink on all GPIO
Pull up, Pull down, High Z, Strong, or Open Drain Drive
Modes on all GPIO
Up to 10 Analog Inputs on GPIO
Two 30 mA Analog Outputs on GPIO
Configurable Interrupt on all GPIO
Additional System Resources
I
2
C Slave, Master, and Multi-Master to 400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference
Complete Development Tools
Free Development Software (PSoC Designer™)
Full-Featured, In-Circuit Emulator and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Bytes Trace Memory
DIGITAL SYSTEM
SRAM
256 Bytes
Interrupt
Controller
Sleep and
Watchdog
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
Global Digital Interconnect
Global Analog Interconnect
PSoC CORE
CPU Core (M8C)
SROM Flash 4K
Digital
Block Array
Multiply
Accum.
Switch
Mode
Pump
Internal
Voltage
Ref.
Digital
Clocks
POR and LVD
System Resets
Decimator
SYSTEM RESOURCES
ANALOG SYSTEM
Analog
Ref
Analog
Input
Muxing
I
2
C
(1 Rows,
4 Blocks)
Port 2 Port 1 Port 0
Analog
Drivers
System Bus
Analog
Block
Array
(2 Columns,
6 Blocks)
Logic Block Diagram
[+] Feedback
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Inhaltsverzeichnis

Seite 1 - Programmable System-on-Chip™

CY8C24123CY8C24223, CY8C24423PSoC® Programmable System-on-Chip™Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-

Seite 2

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 10 of 4332-Pin Part PinoutTable 6. 32-Pin Part Pinout (MLF*)Pin No.TypePin NameD

Seite 3

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 11 of 43Register ReferenceThis section lists the registers of the CY8C27xxx PSoC

Seite 4

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 12 of 43Table 8. Register Map Bank 0 Table: User Space NameAddr (0,Hex)AccessNam

Seite 5

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 13 of 43 DCB03DR2 2E RW 6E AE ACC_DR3 EE RWDCB03CR0 2F # 6F AF ACC_DR2 EF RW30 AC

Seite 6

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 14 of 4317 57 ASC21CR3 97 RW D718 58 98 D819 59 99 D91A 5A 9A DA1B 5B 9B DB1C 5C

Seite 7

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 15 of 43Electrical SpecificationsThis section presents the DC and AC electrical s

Seite 8

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 16 of 43Absolute Maximum RatingsExceeding maximum ratings may shorten the useful

Seite 9

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 17 of 43DC Electrical Characteristics DC Chip-Level SpecificationsThe following t

Seite 10 - CY8C24223, CY8C24423

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 18 of 43DC General Purpose IO SpecificationsThe following table lists guaranteed

Seite 11

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 19 of 43GOLOAOpen Loop GainPower = LowPower = MediumPower = High606080– – dB Spec

Seite 12

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 2 of 43PSoC® Functional OverviewThe PSoC® family consists of many Mixed Signal Ar

Seite 13

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 20 of 43Table 16. 3.3V DC Operational Amplifier SpecificationsSymbol Description

Seite 14

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 21 of 43DC Analog Output Buffer SpecificationsThe following tables list guarantee

Seite 15

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 22 of 43DC Switch Mode Pump SpecificationsThe following table lists guaranteed ma

Seite 16

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 23 of 43DC Analog Reference SpecificationsThe following tables list guaranteed ma

Seite 17

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 24 of 43Table 21. 3.3V DC Analog Reference SpecificationsSymbol Description Min

Seite 18

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 25 of 43DC Analog PSoC Block SpecificationsThe following table lists guaranteed m

Seite 19

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 26 of 43DC Programming SpecificationsThe following table lists guaranteed maximum

Seite 20

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 27 of 43AC Electrical CharacteristicsAC Chip-Level SpecificationsThe following ta

Seite 21

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 28 of 43Figure 12. PLL Lock Timing DiagramFigure 13. PLL Lock for Low Gain Sett

Seite 22

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 29 of 43AC General Purpose IO SpecificationsThe following table lists guaranteed

Seite 23

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 3 of 43Analog SystemThe Analog System is composed of six configurable blocks, eac

Seite 24

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 30 of 43AC Operational Amplifier SpecificationsThe following tables list guarante

Seite 25

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 31 of 43Table 28. 3.3V AC Operational Amplifier SpecificationsSymbol Description

Seite 26

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 32 of 43AC Digital Block SpecificationsThe following table lists guaranteed maxim

Seite 27

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 33 of 43AC Analog Output Buffer SpecificationsThe following tables list guarantee

Seite 28

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 34 of 43AC External Clock SpecificationsThe following tables list guaranteed maxi

Seite 29

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 35 of 43AC I2C SpecificationsThe following table lists guaranteed maximum and min

Seite 30

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 36 of 43Packaging InformationThis section presents the packaging specifications f

Seite 31

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 37 of 43Figure 20. 8-Pin (150-Mil) SOIC Figure 21. 20-Pin (300-Mil) Molded DIP

Seite 32

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 38 of 43Figure 22. 20-Pin (210-Mil) SSOP Figure 23. 20-Pin (300-Mil) Molded SOI

Seite 33

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 39 of 43Figure 24. 28-Pin (300-Mil) Molded DIP 51-85014 *D[+] Feedback

Seite 34

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 4 of 43Additional System ResourcesSystem Resources, some of which have been previ

Seite 35

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 40 of 43Figure 25. 28-Pin (210-Mil) SSOP Figure 26. 28-Pin (300-Mil) Molded SOI

Seite 36

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 41 of 43Figure 27. 32-Pin (5x5 mm) MLF Thermal Impedances Capacitance on Crysta

Seite 37

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 42 of 43Ordering InformationThe following table lists the CY8C24x23 PSoC Device f

Seite 38

Document Number: 38-12011 Rev. *G Revised December 11, 2008 Page 43 of 43PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademar

Seite 39

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 5 of 43Development ToolsThe Cypress MicroSystems PSoC Designer is a Microsoft®Win

Seite 40

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 6 of 43DebuggerThe PSoC Designer Debugger subsystem provides hardwarein-circuit e

Seite 41

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 7 of 43Figure 5. User Module and Source Code Development FlowsThe next step is t

Seite 42

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 8 of 43PinoutsThe CY8C24x23 PSoC device is available in a variety of packages whi

Seite 43

CY8C24123CY8C24223, CY8C24423Document Number: 38-12011 Rev. *G Page 9 of 4328-Pin Part Pinout Table 5. 28-Pin Part Pinout (PDIP, SSOP, SOIC)Pin No.T

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