Cypress Semiconductor CY7C1354CV25 Bedienungsanleitung

CY7C1354CV25CY7C1356CV259-Mbit (256 K × 36/512 K × 18)Pipelined SRAM with NoBL™ ArchitectureCypress Semiconductor Corporation • 198 Champion Court • S

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 10 of 33Truth TableThe truth table for CY7C1354CV25/CY7C1356CV25 follows. [2, 3, 4, 5,

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 11 of 33Partial Truth Table for Read/WriteThe partial truth table for Read/Write for C

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 12 of 33IEEE 1149.1 Serial Boundary Scan (JTAG)The CY7C1354CV25/CY7C1356CV25 incorpora

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 13 of 33TAP Instruction SetOverviewEight different instructions are possible with the

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 14 of 33TAP Controller State DiagramThe TAP Controller State Diagram follows. [13]TEST

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 15 of 33TAP Controller Block DiagramTAP TimingBypass Register0Instruction Register012I

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 16 of 332.5 V TAP AC Test ConditionsInput pulse levels ...

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 17 of 33TAP DC Electrical Characteristics and Operating Conditions(0 °C < TA < +

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 18 of 33Boundary Scan Exit Order(256 K × 36)Bit # 119-ball ID 165-ball ID1K4 B62H4 B73

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 19 of 33Boundary Scan Exit Order(512 K × 18)Bit # 119-ball ID 165-ball ID1K4 B62H4 B73

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 2 of 33Logic Block Diagram – CY7C1356CV25A0, A1, ACMODEBWaBWbWECE1CE2CE3OEREAD LOGICDQ

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 20 of 33Maximum RatingsExceeding maximum ratings may shorten the useful life of thedev

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 21 of 33ISB3Automatic CE power-down current — CMOS inputsMax VDD, device deselected, V

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 22 of 33Switching CharacteristicsOver the Operating RangeParameter [20, 21]Description

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 23 of 33Switching WaveformsFigure 5. Read/Write Timing [26, 27, 28]WRITED(A1)12345678

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 24 of 33Figure 6. NOP, STALL and DESELECT CYCLES [29, 30, 31]Switching Waveforms (con

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 25 of 33Figure 7. ZZ Mode Timing [32, 33]Switching Waveforms (continued)tZZISUPPLYCLK

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 26 of 33Ordering Code DefinitionsOrdering InformationCypress offers other versions of

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 27 of 33Package DiagramsFigure 8. 100-pin TQFP (14 × 20 × 1.4 mm) A100RA Package Outl

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 28 of 33Figure 9. 119-ball PBGA (14 × 22 × 2.4 mm) BG119 Package Outline, 51-85115Pac

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 29 of 33Figure 10. 165-ball FBGA (13 × 15 × 1.4 mm) BB165D/BW165D (0.5 Ball Diameter)

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 3 of 33ContentsSelection Guide ...

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 30 of 33Acronyms Document ConventionsUnits of MeasureAcronym DescriptionBGA ball grid

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 31 of 33Document History PageDocument Title: CY7C1354CV25/CY7C1356CV25, 9-Mbit (256 K

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 32 of 33*M 3754566 09/25/2012 PRIT Updated Package Diagrams (spec 51-85115 (Changed re

Document Number: 38-05537 Rev. *M Revised September 25, 2012 Page 33 of 33NoBL and No Bus Latency are trademarks of Cypress Semiconductor Corporation

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 4 of 33Selection GuideDescription 250 MHz 200 MHz 166 MHz UnitMaximum access time 2.8

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 5 of 33Figure 2. 119-ball BGA (14 × 22 × 2.4 mm) PinoutPin Configurations (continued)

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 6 of 33Figure 3. 165-ball FBGA (13 × 15 × 1.4 mm) PinoutPin Configurations (continued

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 7 of 33Pin DefinitionsPin Name I/O Type Pin DescriptionA0, A1, A Input-synchronousAddr

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 8 of 33Functional OverviewThe CY7C1354CV25/CY7C1356CV25 aresynchronous-pipelined burst

CY7C1354CV25CY7C1356CV25Document Number: 38-05537 Rev. *M Page 9 of 33On the next clock rise the data presented to DQ and DQP(DQa,b,c,d/DQPa,b,c,d fo