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CY7C1361V25
CY7C1363V25
CY7C1365V25
PRELIMINARY
9
ZZ Mode Electrical Characteristics
Parameter Description Test Conditions Min. Max. Unit
I
CCZZ
Snooze mode
standby current
ZZ > V
DD
− 0.2V 15 mA
t
ZZS
Device operation to
ZZ
ZZ > V
DD
− 0.2V 2t
CYC
ns
t
ZZREC
ZZ recovery time ZZ < 0.2V 2t
CYC
ns
Cycle Descriptions
[1, 2, 3]
Next Cycle Add. Used ZZ CE
3
CE
2
CE
1
ADSP ADSC ADV OE DQ Write
Unselected None L X X 1 X 0 X X Hi-Z X
Unselected None L 1 X 0 0 X X X Hi-Z X
Unselected None L X 0 0 0 X X X Hi-Z X
Unselected None L 1 X 0 1 0 X X Hi-Z X
Unselected None L X 0 0 1 0 X X Hi-Z X
Begin Read External L 0 1 0 0 X X X Hi-Z X
Begin Read External L 0 1 0 1 0 X X Hi-Z Read
Continue Read Next L X X X 1 1 0 1 Hi-Z Read
Continue Read Next L X X X 1 1 0 0 DQ Read
Continue Read Next L X X 1 X 1 0 1 Hi-Z Read
Continue Read Next L X X 1 X 1 0 0 DQ Read
Suspend Read Current L X X X 1 1 1 1 Hi-Z Read
Suspend Read Current L X X X 1 1 1 0 DQ Read
Suspend Read Current L X X 1 X 1 1 1 Hi-Z Read
Suspend Read Current L X X 1 X 1 1 0 DQ Read
Begin Write Current L X X X 1 1 1 X Hi-Z Write
Begin Write Current L X X 1 X 1 1 X Hi-Z Write
Begin Write External L 0 1 0 1 0 X X Hi-Z Write
Continue Write Next L X X X 1 1 0 X Hi-Z Write
Continue Write Next L X X 1 X 1 0 X Hi-Z Write
Suspend Write Current L X X X 1 1 1 X Hi-Z Write
Suspend Write Current L X X 1 X 1 1 X Hi-Z Write
ZZ “sleep” None H X X X X X X X Hi-Z X
Note:
1. X = “don't care”, 1 = HIGH, 0 = LOW.
2. The SRAM always initiates a read cycle when ADSP asserted, regardless of the state of GW, BWE, or BW
x
. Writes may occur only on subsequent clocks
after the ADSP
or with the assertion of ADSC. As a result, OE must be driven HIGH prior to the start of the write cycle to allow the outputs to three-state. OE
is a “Don't Care” for the remainder of the write cycle.
3. OE
is asynchronous and is not sampled with the clock rise. It is masked internally during write cycles. During a read cycle DQ = High-Z when OE is inactive
or when the device is deselected, and DQ = data when OE is active.
- CY7C1361V25 1
- CY7C1363V25 1
- CY7C1365V25 1
- CY7C1361V25 10
- PRELIMINARY 10
- Revision History 30
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