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CY7C1365C

Document Number: 001-74584 Rev. *C Page 29 of 30

Document History Page

Document Title: CY7C1365C, 9-Mbit (256 K × 32) Flow-Through Sync SRAM

Document Number: 001-74584

Rev. ECN No. Issue Date

Orig. of

Change

Description of Change

** 3465802 12/15/2011 PRIT New data sheet.

*A 3478370 01/09/2012 PRIT Changed status from Preliminary to Final.

*B 3537322 02/28/2012 PRIT Added JTAG Information (updated the section Pin Descriptions and added the

sections IEEE 1149.1 Serial Boundary Scan (JTAG), TAP Controller State

Diagram, TAP Controller Block Diagram, TAP Timing, TAP AC Switching

Characteristics, 3.3 V TAP AC Test Conditions, 3.3 V TAP AC Output Load

Equivalent, 2.5 V TAP AC Test Conditions, 2.5 V TAP AC Output Load

Equivalent, TAP DC Electrical Characteristics and Operating Conditions,

Identification Register Definitions, Scan Register Sizes, Instruction Codes, and

Boundary Scan Order).

*C 3793968 10/25/2012 PRIT Updated Package Diagram (spec 51-85180 (Changed revision from *E to *F)).

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