AN55662
October 5, 2009 Document No. 001-55662 Rev. ** 5
Details of Improvement
Hardware STORE Related Improvements
pin (Hardware STORE Busy Indication/Hardware
STORE Initiation)
The
pin of the nvSRAM is an open drain I/O pin used
to indicate or initiate a STORE operation. When a STORE
operation is in progress, nvSRAM pulls the
pin low to
indicate that the device is busy and cannot be accessed for
read/write operation. During normal operation, the
pin
can be pulled low to initiate a Hardware STORE operation.
As shown in Table 5, several timing parameters related to
the
pin input and output have changed from
STK14C88-3 to CY14B256LA. All of these changes are
improvements from the original part specification and should
be considered as added benefits in your system while
converting to the new part number.
Write Latch: When a write operation is done, a ‘write latch’ is
set internally. When
is pulled low, nvSRAM checks
this write latch before initiating a STORE. This is done to
prevent any unnecessary loss of endurance cycles.
t
DELAY
If a write latch is set and the
pin is pulled low,
STK14C88-3 enables 1 us time for write operations to
complete before STORE operation begins and reads and
writes are inhibited. This potentially enables inadvertent data
to be written to the nvSRAM during the t
DELAY
duration.
In CY14B256LA, the t
DELAY
parameter enables only one
write cycle time for any ongoing write to complete after
pin is pulled low. This improvement provides better security
from inadvertent write operations.
Also, if
pin is pulled low externally for a minimum of
t
PHSB
time on CY14B256LA, the output driver of
pin
pulls the pin low only indicating a STORE operation within
25 ns (t
DELAY
). This parameter for
low to STORE busy
is not specified in the STK14C88-3. (See Figure 1 and
Figure 2)
LOW when write latch not set:
If no writes are performed since the last STORE/RECALL
operation, STORE operation does not start when
is
pulled low. However, the
pin is still internally pulled
low for 1 us (t
DELAY
) time in the STK14C88-3 device.
CY14B256LA device does not pull the
pin low
internally if write latch is not set.
Figure 1. STK14C88-3: AC Parameters Related to
Figure 2. CY14B256LA: AC Parameters Related to
Write Latch Set Write Latch Not Set
[+] Feedback
(53 Seiten)
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Kommentare zu diesen Handbüchern