Cypress Semiconductor Quad HOTLink II CYV15G0404RB Betriebsanweisung PDF herunterladen (Seite 10)

Quad Independent Channel

HOTLink II™ CYV15G0404DXB

Video PHY Demonstration Board

Page 10 of 92

4.3 FPGA and Control Architecture

The board contains two FPGAs, U2 and U3. The FPGA U2 interfaces to channels A and B of the CYV15G0404DXB device. The

FPGA U3 interfaces to channels C and D of the CYV15G0404DXB device. The major functions performed by the FPGA are as

follows.

Figure 4-3. Clock Configuration

The position of the Micrel programmable clock chip is given to set the

correct orientation for determining the pin numbers for clock configuration.

Note: Jumpers 6 and 10, and jumpers 7 and 11 are physically shorted for

header design considerations.

On board programmable clock option:

Jumper 14 to 10 and Jumper 15 to 11 for using Programmable Micrel clock

as Reference Clock. Remove all other jumpers from the header. This option

must be chosen if the auto rate detect feature of the board is used.

On board 74.25 MHz crystal oscillator clock option:

Jumper 9 to 10 and Jumper 12 to 11 for using 74.25 MHz crystal oscillator

clock as Reference Clock. All other jumpers must be removed. This option

should be chosen for HD-SDI transmit jitter measurement. The GUI must be

set to a datarate of 1485 Mb/s (FR box unchecked) for the associated

channel.

FPGA clock option:

Jumper 2 to 6 and Jumper 3 to 7 for using FPGA clock (FCLK) as Reference

Clock. Remove all other jumpers from the clock configuration header. This

clock option is only used when implementing the upconversion feature of the

board. See Appendix F for further details.

External clock option:

Remove all jumpers from the clock configuration header. Provide a

differential clock to pins 6 and 7, with pins 5 and 8 as respective grounds

(pins 6 and 5 and pins 7 and 8 are signal and ground pairs). Ensure that the

GUI is set to the same clock frequency as the external clock.

JP10, JP11, JP12, JP13

REFCLKx+

REFCLKx-

FCLKx+

FCLKx-

CLOCKOUT+

CLOCKOUT-

GND

OSC+

OSC-

412

913

Micrel

Programmable

Clock

SY87729

[+] Feedback

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 91 92

Kommentare zu diesen Handbüchern

Keine Kommentare

Cypress Semiconductor Quad HOTLink II CYV15G0404RB Betriebsanweisung Seite 10

Kommentare zu diesen Handbüchern

Verwandte Produkte und Handbücher für Wanduhren Cypress Semiconductor Quad HOTLink II CYV15G0404RB