Cypress Semiconductor CYDC128B16 Bedienungsanleitung Seite 8

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CYDC128B16
Document #: 001-01638 Rev. *H Page 8 of 29
Architecture
The CYDC128B16 consists of an array of 4k, 8k, or 16k words
of 16 dual-port RAM cells, I/O and address lines, and control
signals (CE
, OE, R/W). These control pins permit independent
access for reads or writes to any location in memory. To handle
simultaneous writes/reads to the same location, a BUSY
pin is
provided on each port. Two Interrupt (INT
) pins can be used for
port-to-port communication. Two Semaphore (SEM
) control pins
are used for allocating shared resources. With the M/S
pin, the
device can function as a master (BUSY
pins are outputs) or as a
slave (BUSY
pins are inputs). The device also has an automatic
power down feature controlled by CE
. Each port is provided with
its own output enable control (OE
), which allows data to be read
from the device.
Table 1. Non-Contending Read/Write
Inputs Outputs
[1]
Operation
CE R/W OE UB LB SEM I/O
8
I/O
15
I/O
0
I/O
7
H X X X X H High Z High Z Deselected: power down
X X X H H H High Z High Z Deselected: power down
L L X L H H Data In High Z Write to upper byte only
L L X H L H High Z Data In Write to lower byte only
L L X L L H Data In Data In Write to both bytes
L H L L H H Data Out High Z Read upper byte only
L H L H L H High Z Data Out Read lower byte only
L H L L L H Data Out Data Out Read both bytes
X X H X X X High Z High Z Outputs disabled
H H L X X L Data Out Data Out Read data in semaphore flag
X H L H H L Data Out Data Out Read data in semaphore flag
H X X X L Data In Data In Write D
IN0
into semaphore flag
X X H H L Data In Data In Write D
IN0
into semaphore flag
LXXLXL Not allowed
L X X X L L Not allowed
1. This column applies to x16 devices only.
Table 2. Interrupt Operation Example (Assumes BUSY
L
= BUSY
R
= HIGH)
[1]
Function
Left Port Right Port
R/W
L
CE
L
OE
L
A
0L–13L
INT
L
R/W
R
CE
R
OE
R
A
0R–13R
INT
R
Set right INT
R
flag L L X 3FFF
[2]
XXXX X L
[3]
Reset right INT
R
flagXXXXXXLL3FFF
[2]
H
[4]
Set left INT
L
flag X X X X L
[4]
LLX 3FFE
[2]
X
Reset left INT
L
flag X L L 3FFE
[2]
H
[3]
XXX X X
1. See Interrupts Functional Description for specific highest memory locations by device.
2. See Functional Description for specific addresses by device.
3. If BUSY
L
= L, then no change.
4. If BUSY
R
= L, then no change.
[+] Feedback
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