Cypress Semiconductor CYV15G0404DXB Betriebsanweisung PDF herunterladen (Seite 2)

CYV15G0404DXB Evaluation Board

Users Guide

Page 2 of 56

TABLE OF CONTENTS

1.0 OVERVIEW ......................................................................................................................................5

2.0 KIT CONTENTS ...............................................................................................................................5

3.0 FEATURES OF THE CYV15G0404DXB .........................................................................................5

4.0 FUNCTIONAL DESCRIPTION OF CYV15G0404DXB ....................................................................6

4.0 CYV15G0404DXB TRANSCEIVER LOGIC BLOCK DIAGRAM .....................................................6

5.0 BOARD PHOTOGRAPH AND PIN DESCRIPTIONS ....................................................................10

6.0 ADJUSTING SETTINGS ON THE BOARD ...................................................................................17

6.1 Speed Select Jumpers ..............................................................................................................17

6.2 DIP Switches .............................................................................................................................17

6.3 Asserting Values to Control Latches .........................................................................................17

6.4 Reference Clock Input Options .................................................................................................18

7.0 TEST MODES ................................................................................................................................19

7.1 BIST Test Set-up ......................................................................................................................19

7.1.1 Single Channel BIST Set-up ...........................................................................................................19

7.1.1.1 Equipment Required .................................................................................................................................... 19

7.1.1.2 Test Equipment Set-up ................................................................................................................................ 20

7.1.1.3 Test Set-up .................................................................................................................................................... 20

7.1.1.4 External Loopback Mode ............................................................................................................................. 21

7.1.2 Four Channel BIST Set-up with Global Enable ...............................................................................22

7.1.2.1 Equipment Required .................................................................................................................................... 22

7.1.2.2 Test Set-up .................................................................................................................................................... 22

7.2 Parallel Data Test Mode ...........................................................................................................23

7.2.1 Equipment Required .......................................................................................................................23

7.2.2 Parallel Data Test Set-up ................................................................................................................24

7.2.2.1 Encoder Enable Mode .................................................................................................................................. 24

7.2.2.2 Encoder Bypass Mode ................................................................................................................................. 25

7.3 Reclocker Test Mode ................................................................................................................27

7.3.1 Equipment Required .......................................................................................................................27

7.3.2 Test Equipment Set-up ...................................................................................................................28

7.3.3 Test Set-up ......................................................................................................................................28

APPENDIX A: Schematic Diagram of CYV15G0404DXB Evaluation Board .................................... 30

APPENDIX B: PCB Layout for CYV15G0404DXB Evaluation Board................................................ 38

APPENDIX C: Bill Of Material (BOM) CYV15G0404DXB Evaluation Board .................................... 55

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