Document Number: 001-53754 Rev. *F Page 47 of 50
■ WORKAROUND
To prevent an invalid Flash read, a dummy read from each Flash page must occur before use of the pages. A delay of 5 µs must occur
after the dummy read and before a real read. The dummy reads occurs as soon as possible and must be located in Flash page 0
before a read from any other Flash page. An example for reading a byte of memory from each Flash page is listed below. Placed it
in boot.tpl and boot.asm immediately after the ‘start:’ label.
// dummy read from each 8K Flash page
// page 1
mov A, 0x20 // MSB
mov X, 0x00 // LSB
romx
// wait at least 5 µs
mov X, 14
loop1:
dec X
jnz loop1
3. PMA Index Register fails to auto-increment with CPU_Clock set to SysClk/1 (24 MHz).
■ PROBLEM DEFINITION
When the device is operating at 4.75 to 5.25 V and the CPU_Clock is set to SysClk/1 (24 MHz), the USB PMA Index Register may
fail to increment automatically when used in an OUT endpoint configuration at Full-Speed. When the application program attempts to
use the bReadOutEP() function the first byte in the PMA buffer is always returned.
■ TRIGGER CONDITION(S)
An internal flip-flop hold problem associated with Index Register increment function. All reads of the associated RAM originate from
the first byte. The hold problem has no impact on other circuits or functions within the device.
■ WORKAROUND
To make certain that the index register properly increments, set the CPU_Clock to SysClk/2 (12 MHz) during the read of the PMA
buffer. An example for the clock adjustment method is listed below.
PSoC Designer™ 4.3 User Module workaround: PSoC Designer Release 4.3 and subsequent releases includes a revised full-speed
USB User Module with the revised firmware work-around included (see example below).
;;
;; 24 MHz read PMA workaround
;;
M8C_SetBank1
mov A, reg[OSC_CR0]
push A
and A, 0xf8 ;clear the clock bits (briefly chg the cpu_clk to 3 MHz)
or A, 0x02 ;will set clk to 12Mhz
mov reg[OSC_CR0],A ;clk is now set at 12 MHz
M8C_SetBank0
.loop:
mov A, reg[PMA0_DR] ; Get the data from the PMA space
mov [X], A ; save it in data array
inc X ; increment the pointer
dec [USB_APITemp+1] ; decrement the counter
jnz .loop ; wait for count to zero out
;;
;; 24MHz read PMA workaround (back to previous clock speed)
;;
pop A ;recover previous reg[OSC_CR0] value
M8C_SetBank1
mov reg[OSC_CR0],A ;clk is now set at previous value
M8C_SetBank0
;;
;; end 24Mhz read PMA workaround
(21 Seiten)
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