Cypress Semiconductor Perform CY7C1513KV18 Bedienungsanleitung PDF herunterladen (Seite 27)

CYWUSB6934

CYWUSB6932

Document Number : 38-16007 Rev. *L Page 27 of 34

Table 38. DIO Interface

Parameter Description Min Typ Max Unit

Transmit

TX_DIOVAL_SU

DIOVAL setup time 2.1 – – µs

TX_DIO_SU

DIO setup time 2.1 – – µs

TX_DIOVAL_HLD

DIOVAL hold time 0 – – µs

TX_DIO_HLD

DIO hold time 0 – – µs

TX_IRQ_HI

Minimum IRQ high time - 32 chips/bit DDR – 8 – µs

Minimum IRQ high time - 32 chips/bit – 16 – µs

Minimum IRQ high time - 64 chips/bit – 32 – µs

TX_IRQ_LO

Minimum IRQ low time - 32 chips/bit DDR – 8 – µs

Minimum IRQ low time - 32 chips/bit – 16 – µs

Minimum IRQ low time - 64 chips/bit – 32 – µs

Receive

RX_DIOVAL_VLD

DIOVAL valid time - 32 chips/bit DDR –0.01 – 6.1 µs

DIOVAL valid time - 32 chips/bit –0.01 – 8.2 µs

DIOVAL valid time - 64 chips/bit –0.01 – 16.1 µs

RX_DIO_VLD

DIO valid time - 32 chips/bit DDR –0.01 – 6.1 µs

DIO valid time - 32 chips/bit –0.01 – 8.2 µs

DIO valid time - 64 chips/bit –0.01 – 16.1 µs

RX_IRQ_HI

Minimum IRQ high time - 32 chips/bit DDR – 1 – µs

Minimum IRQ high time - 32 chips/bit – 1 – µs

Minimum IRQ high time - 64 chips/bit – 1 – µs

RX_IRQ_LO

Minimum IRQ low time - 32 chips/bit DDR – 8 – µs

Minimum IRQ low time - 32 chips/bit – 16 – µs

Minimum IRQ low time - 64 chips/bit – 32 – µs

Figure 13. DIO Receive Timing Diagram

Figure 14. DIO Transmit Timing Diagram

data

DIO/

DIOVAL

IRQ

data

RX_IRQ_HI

RX_IRQ_LO

RX_DIOVAL_VLD

RX_DIO_VLD

data

DIO/

DIOVAL

IRQ

data data

TX_IRQ_HI

TX_IRQ_LO

TX_DIO_SU

TX_DIOVAL_SU

TX_DIOVAL_HLD

TX_DIO_HLD

Not Recommended for New Designs

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