Cypress Semiconductor FX2LP Technical Information PDF herunterladen (Seite 16)

xvi List of Figures

(List of Figures)

Figure 10-30. FIFO-Read w/ AUTOIN = 0, Committing Packets via INPKTEND w/SKIP=0 ..............10-47

Figure 10-31. FIFO-Read w/ AUTOIN = 0, Committing Packets via EPxBCL ....................................10-48

Figure 10-32. AUTOIN=1, GPIF FIFO Read Transactions, AUTOIN = 1 ...........................................10-48

Figure 10-33. FIFO-Read Transaction Code, AUTOIN = 1 ................................................................10-49

Figure 10-34. Firmware intervention, AUTOIN = 0/1 ..........................................................................10-49

Figure 10-35. Committing a Packet by Writing INPKTEND with EPx Number (w/SKIP=0) ................10-50

Figure 10-36. Skipping a Packet by Writing to INPKTEND w/SKIP=1 ...............................................10-50

Figure 10-37. Sourcing an IN Packet by writing to EPxBCH:L ...........................................................10-51

Figure 10-38. Firmware Launches a FIFO-Write Waveform ..............................................................10-52

Figure 10-39. Example FIFO-Write Transaction .................................................................................10-52

Figure 10-40. FIFO-Write Transaction Waveform ..............................................................................10-53

Figure 10-41. GPIFTool Setup for the Waveform of Figure 10-40 .....................................................10-53

Figure 10-42. FIFO-Write Transaction Functions ...............................................................................10-54

Figure 10-43. Initialization Code for FIFO-Write Transactions ...........................................................10-55

Figure 10-44. FIFO-Write w/ AUTOOUT = 0, Committing Packets via EPxBCL ................................10-55

Figure 10-45. CPU not in data path, AUTOOUT=1 ............................................................................10-56

Figure 10-46. TD_Init Example: Configuring AUTOOUT = 1 .............................................................10-56

Figure 10-47. FIFO-Write Transaction Code, AUTOOUT = 1 ............................................................10-56

Figure 10-48. Firmware can Skip or Commit, AUTOOUT = 0 ............................................................10-57

Figure 10-49. Initialization Code for AUTOOUT = 0 ...........................................................................10-57

Figure 10-50. Committing an OUT Packet by Writing OUTPKTEND w/SKIP=0 ................................10-57

Figure 10-51. Skipping an OUT Packet by Writing OUTPKTEND w/SKIP=1 .....................................10-58

Figure 10-52. Sourcing an OUT Packet (AUTOOUT = 0) ..................................................................10-58

Figure 10-53. Ensuring that the FIFO is Clear after Power-On-Reset ................................................10-59

Figure 10-54. Burst FIFO-Read Transaction Functions .....................................................................10-60

Figure 10-55. Initialization for Burst FIFO-Read Transactions ...........................................................10-61

Figure 10-56. Burst FIFO-Read Transaction Example, Writing INPKTEND w/SKIP=0 to Commit ....10-62

Figure 10-57. Burst FIFO-Read Transaction Example, Writing EPxBCL to Commit ..........................10-63

Figure 11-1. FX2 CPU Features .........................................................................................................11-1

Figure 11-2. FX2 to Standard 8051 Timing Comparison ....................................................................11-4

Figure 11-1. FX2 Internal Data RAM ..................................................................................................11-7

Figure 13-1. FX2 I/O Pin ....................................................................................................................13-2

Figure 13-2. I/O Port Output-Enable Registers ..................................................................................13-3

Figure 13-3. I/O Port Data Registers ..................................................................................................13-4

Figure 13-4. I/O-Pin Logic when Alternate Function is an OUTPUT ..................................................13-5

Figure 13-5. I/O-Pin Logic when Alternate Function is an INPUT ......................................................13-6

Figure 13-6. General I²C Transfer ....................................................................................................13-12

Figure 13-7. Addressing an I²C Peripheral .......................................................................................13-13

Figure 13-8. I²C-Compatible Registers .............................................................................................13-14

Figure 14-1. Timer 0/1 - Modes 0 and 1 .............................................................................................14-3

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Cypress Semiconductor FX2LP Technical Information Seite 16