
EZ-USB FX2 Technical Reference Manual
Page 13-16 EZ-USB FX2 Technical Reference Manual v2.1
dition is detected on the bus. BERR is automatically cleared when the firmware reads or writes the
I2DAT register.
Clearing the BERR bit (by accessing I2DAT) does not automatically re-enable the bus controller.
Once a bus error occurs, the bus controller remains disabled until a STOP condition is detected.
ID1, ID0
These bits are automatically set by the boot loader to indicate the Boot EEPROM’s addressing
mode. They’re normally used only for debug purposes; for full details, see Section 13.5.
13.4.3 Sending Data
To send a multiple-byte data record, follow these steps:
1. Set START=1.
2. Write the peripheral address and direction=0 (for write) to I2DAT.
3. Wait for DONE=1*. If BERR=1 or ACK=0, go to step 7.
4. Load I2DAT with a data byte.
5. Wait for DONE=1*. If BERR=1 or ACK=0 go to step 7.
6. Repeat steps 4 and 5 for each byte until all bytes have been transferred.
7. Set STOP=1.
* If INT3 is enabled, each “Wait for DONE=1” step can be interrupt-driven and handled by an interrupt ser-
vice routine. See
Chapter 4, "Interrupts"
for more details.
13.4.4 Receiving Data
To read a multiple-byte data record, follow these steps:
1. Set START=1.
2. Write the peripheral address and direction=1 (for read) to I2DAT.
3. Wait for DONE=1*. If BERR=1 or ACK=0, terminate by setting STOP=1.
4. Read I2DAT and discard the data. This initiates the first burst of nine SCL pulses to clock in
the first byte from the slave.
5. Wait for DONE=1*. If BERR=1, terminate by setting STOP=1.
6. Read the data from I2DAT. This initiates another read transfer.
7. Repeat steps 5 and 6 for each byte until ready to read the second-to-last byte.
8. Before reading the second-to-last I2DAT byte, set LASTRD=1.
9. Read the data from I2DAT. With LASTRD=1, this initiates the final byte read on the bus.
10. Wait for DONE=1*. If BERR=1, terminate by setting STOP=1.
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