
Table of Contents
iii
(Table of Contents)
4.4.2.2 SOF Interrupt .....................................................................................................4-13
4.4.2.3 Suspend Interrupt...............................................................................................4-13
4.4.2.4 USB RESET Interrupt ........................................................................................4-13
4.4.2.5 HISPEED Interrupt.............................................................................................4-13
4.4.2.6 EP0ACK Interrupt...............................................................................................4-13
4.4.2.7 Endpoint Interrupts.............................................................................................4-14
4.4.2.8 In-Bulk-NAK (IBN) Interrupt................................................................................4-14
4.4.2.9 EPxPING Interrupt .............................................................................................4-14
4.4.2.10 ERRLIMIT Interrupt ..........................................................................................4-15
4.4.2.11 EPxISOERR Interrupt ......................................................................................4-15
4.5 USB-Interrupt Autovectors ..........................................................................................................4-15
4.5.1 USB Autovector Coding .................................................................................................4-17
4.6 I²C-Compatible Bus Interrupt.......................................................................................................4-18
4.7 FIFO/GPIF Interrupt (INT4) .........................................................................................................4-19
4.8 FIFO/GPIF-Interrupt Autovectors ................................................................................................4-20
4.8.1 FIFO/GPIF Autovector Coding.......................................................................................4-21
Chapter 5. Memory
5.1 Introduction....................................................................................................................................5-1
5.2 Internal Data RAM.........................................................................................................................5-1
5.2.1 The Lower 128.................................................................................................................5-2
5.2.2 The Upper 128.................................................................................................................5-2
5.2.3 SFR (Special Function Register) Space..........................................................................5-2
5.3 External Program Memory and External Data Memory.................................................................5-3
5.3.1 56- and 100-pin FX2........................................................................................................5-4
5.3.2 128-pin FX2 .....................................................................................................................5-4
5.4 FX2 Memory Maps........................................................................................................................5-5
5.5 “Von-Neumannizing” Off-Chip Program and Data Memory...........................................................5-8
5.6 On-Chip Data Memory at 0xE000-0xFFFF ...................................................................................5-9
Chapter 6. Power Management
6.1 Introduction....................................................................................................................................6-1
6.2 USB Suspend................................................................................................................................6-3
6.2.1 SUSPEND Register.........................................................................................................6-4
6.3 Wakeup/Resume...........................................................................................................................6-4
6.3.1 Wakeup Interrupt .............................................................................................................6-5
6.4 USB Resume (Remote Wakeup) ..................................................................................................6-6
6.4.1 WU2 Pin...........................................................................................................................6-6
Chapter 7. Resets
7.1 Introduction....................................................................................................................................7-1
7.2 Power-On Reset (POR).................................................................................................................7-2
7.3 Releasing the CPU Reset .............................................................................................................7-3
7.3.1 RAM Download................................................................................................................7-3
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