Cypress Semiconductor FX2LP Technical Information Seite 231

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Chapter 10. General Programmable Interface (GPIF) Page 10-41
Figure 10-23. Initialization Code for Single-Write Transactions
10.4.3 FIFO-Read and FIFO-Write Transactions
FIFO-Read and FIFO-Write waveforms transfer data to and from the FX2’s Slave FIFOs (see
Chapter 9 "Slave FIFOs"
). The waveform is started by writing to EPxTRIG, where “x” represents
the FIFO (2, 4, 6, or 8) to/from which data should be transferred, or to GPIFTRIG.
A FIFO-Read or FIFO-Write waveform will generally transfer a long stream of data rather than a
single byte or word. Usually, the waveform is programmed to terminate when a FIFO flag asserts
(e.g., when an IN FIFO is full or an OUT FIFO is empty) or after a specified number of
transactions
.
A “transaction” is a transfer of a single byte (if WORDWIDE = 0) or word (if WORDWIDE = 1) to or
from a FIFO. Using the
GPIFTool
’s terminology, a transaction is either an “Active” or “Next Data”.
10.4.3.1 Transaction Counter
To use the Transaction Counter for FIFO “x”, load GPIFTCB3:0 with the desired number of transac-
tions (1 to 4,294,967,295; 0 = 4,294,967,296). When a FIFO-Read or -Write waveform is triggered
on that FIFO, the GPIF will transfer the specified number of bytes (or words, if WORDWIDE = 1)
automatically.
This mode of operation is called
Long Transfer Mode
; when the Transaction Counter is used in this
way, the Waveform Descriptor should branch to the Idle State after each transaction.
void TD_Init( void )
{
… … … … …
GpifInit(); // Configures GPIF from GPIFTool generated waveform data
// TODO: configure other endpoints, etc. here
// TODO: arm OUT buffer(s) here
// setup INT4 as internal source for GPIF interrupts
// using INT4CLR (SFR), automatically enabled
//INTSETUP |= 0x03; //Enable INT4 Autovectoring
//SYNCDELAY;
//GPIFIE = 0x03; // Enable GPIFDONE and GPIFWF interrupt(s)
//SYNCDELAY;
//EIE |= 0x04; // Enable INT4 ISR, EIE.2(EIEX4)=1
// TODO: configure GPIF interrupt(s) to meet your needs here
… … … … …
// tell peripheral we’re going into high speed xfr mode
Peripheral_SetAddress( PERIPHCS );
Peripheral_SingleByteWrite( P_HSMODE );
}
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