Cypress Semiconductor FX2LP Technical Information PDF herunterladen (Seite 57)

Chapter 2. Endpoint Zero Page 2-3

The STATUS stage consists of an empty data packet with the opposite direction of the data stage,

or an IN if there was no data stage. This empty data packet gives the device a chance to ACK or

NAK the entire CONTROL transfer.

The HSNAK bit holds off the completion of a CONTROL transfer until the device has had time to

respond to a request. For example, if the host issues a Set_Interface Request, the FX2 firmware

performs various housekeeping chores such as adjusting internal modes and re-initializing end-

points. During this time, the host issues handshake (STATUS stage) packets to which the FX2

automatically responds with NAKs, indicating “busy.” When the firmware completes its housekeep-

ing operations, it clears the HSNAK bit (by writing 1 to it), which instructs the FX2 to ACK the

STATUS stage, terminating the transfer. This handshake prevents the host from attempting to use

an interface before it’s fully configured.

To perform an endpoint stall for the DATA or STATUS stage of an endpoint zero transfer (the

SETUP stage can never stall), firmware must set both the STALL and HSNAK bits for endpoint

zero.

Some CONTROL transfers do not have a DATA stage. Therefore, the code that processes the

SETUP data should check the length field in the SETUP data (in the 8-byte buffer at SETUPDAT)

and arm endpoint zero for the DATA phase (by loading EP0BCH:L) only if the length field is non-

zero.

Two interrupts provide notification that a SETUP packet has arrived, as shown in Figur e2-2.

Figure 2-2. Two Interrupts Associated with EP0 CONTROL Transfers

The FX2 asserts the SUTOK (Setup Token) interrupt request when it detects the SETUP token at

the beginning of a CONTROL transfer. This interrupt is normally used for debug only.

The FX2 asserts the SUDAV (Setup Data Available) interrupt request when the eight bytes of

SETUP data have been received error-free and transferred to the SETUPDAT buffer. The FX2

automatically takes care of any retries if it finds errors in the SETUP data. These two interrupt

request bits must be cleared by firmware.

Firmware responds to the SUDAV interrupt request by either directly inspecting the eight bytes at

SETUPDAT or by transferring them to a local buffer for further processing. Servicing the SETUP

data should be a high priority, since the USB Specification stipulates that CONTROL transfers

8 bytes

Setup

Data

Data Packet

H/S Pkt

Token Packet

SETUP Stage

SUTOK

Interrupt

SUDAV

Interrupt

8 RAM

bytes

SETUPDAT

1 2 ... 52 53 54 55 56 57 58 59 60 61 62 ... 459 460

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