Cypress Semiconductor Perform CY7C1372D Betriebsanweisung PDF herunterladen (Seite 68)

The extract of the PAR report shown here is for the 6M device. Notice that the timing constraints

are compared to the actual timing achieved. If you fail to meet timing, this will be reported here.

The peak memory use was 639MB for the 6M device. Your workstation should have at least 1GB

to do this work.

Also, the time required for the PAR is about 1 hour, 42 minutes. Large chips are time consuming

to route. This work was done on a Pentium 4, 2.4 GHz PC with 1 GB RAM. Newer PCs with

faster RAM and processors tend to reduce this time linearly.

6.1.8 Simulation

The test files are used in the simulation and testing of the Framework code. The testbench file is

TB_quixote.vhd and it uses several components for testing that are defined by the other model

files. These model files are very simple and are only for simple testing only. More complex models

may be needed to adequately model more advanced uses.

The testbench contains a set of simulation steps that exercise various functions on the framework

logic for basic interface testing. Behavioral procedures have been written to simulate the DSP

timing for sync and asynchronous memory accesses that are useful in simulating data movement.

Also, the steps to setup the logic for data streaming support are shown so that interrupt servicing

(DMA or CPU accesses), trigger and event log use are illustrated.

6.1.8.1 Using the Testbench

The testbench for the Quixote Framework logic is tb_quixote.vhd. It is included in the hierarchy of

the design in the Xilinx ISE tool. When you select this file in the hierarchy, the process window

then changes to show the simulations you can run. Usually you will want to do functional

simulation since this is the fastest to run and most problems can be worked out at this level.

Simulations using real timing are quite lengthy usually requiring overnight runs.

When you select the simulation process and start it, ModelSim will be invoked and the simulation

wil begin. A macro for the wave window has been included, wave.do, that was used here during

development which may be helpful in displaying the signals.

Here is a sample view of the ModelSim wave window.

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Cypress Semiconductor Perform CY7C1372D Betriebsanweisung Seite 68